1. Field of the Invention
The present invention relates to a method for forming a Cu thin film, and in particular, to a method for forming a Cu thin film suitable for forming a Cu thin film for wiring, where a copper film is formed on a diffusion barrier film formed on an insulating film formed on a substrate to be processed and provided with a recessed portion, and the recessed portion is filled with copper material.
2. Description of the Related Art
In recent years, according to high performance orientation of semiconductor devices, Cu (copper) has been used as wiring material. The reason is that Cu has a lower electrical resistance than that of Al (aluminum), and Cu has a high resistance to a phenomenon such as stress migration and electro-migration where diffusion behavior of metal atoms constituting wiring is dominant.
In forming a wiring using Cu, a pattern of wiring and connection hole (via hole, or contact hole) is formed on an insulating film, a barrier film is then formed on the said insulating film, a copper (Cu) film is embedded into a patterned recessed portion, and an extra copper film or the like is removed by CMP (chemical mechanical polishing).
The method for forming a Cu thin film which has been used conventionally will be explained with reference to FIGS. 1(a) to 1(e). An insulating film 2 formed on a substrate (semiconductor substrate) 1 and provided with a recessed portion is etched in a predetermined pattern as shown in FIG. 1(a). A base barrier film 3 is formed by PVD process, as shown in FIG. 1(b). Next, as shown in FIG. 1(c), a first copper film 4 is formed by PVD process. This first copper film 4 (as a deposition film) is referred to as a Cu-Seed film, and serves as a base film for an electrolytic copper plating electrode. Then, as shown in FIG. 1(d), a second copper film denoted by reference numeral 5 is embedded into a predetermined pattern of the insulating film 2 using an electrolytic plating apparatus and utilizing the first copper film (Cu-Seed film) 4 as an electrode. Further, as shown in FIG. 1(e), an extra copper film or the like is removed by CMP (chemical mechanical polishing).
The second Cu film 5 embedded in the above manner will be used as wiring for a device. According to advances in integration of devices in recent years, it is required to form a barrier film and a Cu-Seed film having an excellent covering property to fine and deep holes or grooves. The method for embedding the electrolytic copper plating in the predetermined pattern of the insulating film has been employed, since it is economical. But, in the electrolytic copper plating, it is necessary to form the first copper film serving as the Cu-Seed film in advance, as described above.
As one method or process to which attention has been paid as a method for forming the first copper film serving as this Cu-Seed film with an excellent covering property, there is a CVD process (chemical vapor deposition process) using an organic metal compound or an organic metal complex as raw material.
A conventional method for forming a Cu thin film for wiring using a CVD process for forming a first copper film serving as a Cu-Seed film will be explained with reference to FIGS. 2(a) to 2(f). An insulating film 2 formed on a substrate (semiconductor substrate) 1 and provided with a recessed portion is etched in a predetermined pattern, as shown in FIG. 2(a). A base barrier film (for example, TiN film) 3 is formed on the insulating film 2, for example, by a MOCVD (Metal Organic Chemical Vapor Deposition) process, as shown in FIG. 2(b). Then, as shown in FIG. 2(c), a first copper film 4 (as a deposition film) serving as a Cu-Seed film is formed by a CVD process. Further, as shown in FIG. 2(e), a second copper film denoted by reference numeral 5 is embedded into a predetermined pattern of the insulating film 2 using an electrolytic plating apparatus where the first copper film 4 serving as the Cu-Seed film is used as an electrode. Finally, extra or excess copper film or the like is removed by CMP (chemical mechanical polishing), as shown in FIG. 2(f). In this method, after the first copper film 4 has been formed, a heating (annealing) process can be interposed, as shown in FIG. 2(d), for improving adhesion, and the first copper film 4 which has been subjected to the annealing process is used as the Cu-Seed film. Also, although it is not shown, after the base barrier film 3 is formed, a plasma process may be interposed in order to improve adhesion prior to formation of the first copper film 4.
In the conventional method for forming a Cu thin film for wiring, as described above, the CVD process using an organic metal compound or an organic metal complex as the raw material is employed to form the first copper film serving as the Cu-Seed film, whereby it becomes possible to form a first copper film (Cu-Seed film) which can correspond to a fine pattern.
However, when a section of the film plated with electrolytic copper in the state shown in FIG. 2(e) in the conventional method for forming a Cu thin film for wiring using the CVD process is observed by a SEM (scanning electron microscope), it has been found that there are fine voids in the vicinity of a boundary or interface region between the first copper film and the second copper film formed by the electrolytic copper plating as shown in FIGS. 3 and 4.
These voids deteriorate interface characteristics of the second copper film formed by the electrolytic copper plating on the first copper film (Cu-Seed film), which is in an as-deposited state. When the Cu thin film thus formed is used as wiring, there occurs a drawback such as increase in wiring resistance, reduction in electro-migration resistance or the like.
Regarding the semiconductor circuit devices, current operation speeds thereof are required to be further enhanced. It is essential to reduce the resistance in wiring in order to manufacture such high speed devices. As described above, however, if the wiring resistance is increased due to the existence of fine voids in the vicinity of the interface between the first copper film (Cu-Seed film), which is in the as deposited state, and the second copper film formed thereon by the electrolytic copper plating, such increase may result in a fatal defect in manufacturing of a high speed device.
Furthermore, according to increases in integration density of a semiconductor circuit components, a wiring portion is made fine and the density of current flowing in this portion is increased. For this reason, it is requested for wiring to have a further increased electro-migration resistance than that of conventional wiring. Thus reductions in electro-migration resistance may also result in a fatal defect in manufacturing a high speed device.